The fabrication of semiconductor integrated circuits (ICs) is an extremely complex process that involves several hundred or more operations. ICs are fabricated by selectively implanting impurities into and applying conductive and insulative layers onto a semiconductor substrate. Semiconductor ICs (die) are not manufactured individually but rather as an assembly of a hundred or more die on a “wafer,” which is then diced up to produce the individual die.
Increasing production yield is an ongoing problem in the manufacture of semiconductor die. Because of various defects that can occur in the fabrication of a wafer, a significant number of die have to be discarded for one reason or another, thereby decreasing the percentage yield per wafer and driving up the cost of the individual die. Defects are typically caused by foreign particles, minute scratches, and other imperfections introduced during photoresist, photomask, and diffusing operations subjected to the wafer.
Electrical probe testing is a commonly used method for determining the impact of the defects on the ICs themselves. For instance, the wafers containing the die may be subjected to the electrical probe test to ascertain which die fail and which ones pass. In many cases, not all wafers are tested, and thus a number of defective die can be shipped from the manufacturer to clients. Moreover, the electrical probe testing process cannot detect all failures, which also leads to the shipping of defective die.
Accordingly, what is needed in the art is a process for manufacturing an IC that reduces the number of defective die that are ultimately shipped from the manufacturer to the customer, as well as reduces the number of die that undergo field failure due to reliability problems caused by defects that are ultimately shipped.